High-performance sensor interface design

Abstract

Edge sensors play a critical role in the modern AI era, serving as the front line for data acquisition and intelligent perception. Many emerging applications—such as drones, wearable health monitors, and smart industrial systems—demand sensor interfaces capable of high-resolution, low-latency, and energy-efficient readout to enable real-time decision-making and accurate analytics at the edge. In this talk, we explore recent innovations in sensor readout circuits, featuring novel amplifier topologies, latest zoom ADC architectures, and time-domain ΔΣ modulation. Several design examples in ADCs and capacitive sensor readout circuits will be presented.

Biography

Xiyuan Tang is an assistant professor at Peking University. Xiyuan received the B.Sc. degree (Hons.) from the School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China, in 2012, and the M.S. and Ph.D. degree in electrical engineering from The University of Texas at Austin, Austin, TX, USA, in 2014 and 2019 respectively. From 2014 to 2017, he was a Design Engineer with Silicon Laboratories, Austin, TX, where he worked on the RF receiver design. He was a postdoctoral researcher at the University of Texas at Austin from 2019 to 2021.

He serves on the Technical Program Committees (TPC) of ISSCC and ASSCC. He also serves as an associate editor for IEEE Solid-State Circuits Letters. 

Fast-Transient Response Hybrid Power Converter for xPU

Abstract

Rapid workload transitions (~ns) in xPU can induce substantial voltage droops (VDs) on its switching power supplies, leading to severe performance degradation. To mitigate it, beyond improving controller bandwidth and enhancing the slew rate of inductor current (IL), a hybrid power converter — comprising a Buck converter and integrated voltage regulators (IVRs) — delivers auxiliary currents and compensates for the discrepancy of IL and xPU load current (Iload) during transients. By optimizing Iload detection through the capacitor-current-sensing (CCS) technique and implementing a smooth handshaking mechanism between the Buck converter and IVRs, VDs can be suppressed within 1% of the nominal output voltage under load transients exceeding ∆Iload>1A within a few nano-seconds.

Biography

Philex Fan received the Ph.D. degree in electrical engineering from University of Cambridge, Cambridge, U.K., in 2019. Before the faculty position in NCKU, he worked with TSMC and Arm Ltd. as Principal Engineer and Senior Research Engineer, respectively. His research interests span several areas include analog & mixed-signal integrated circuits, power management integrated circuits, ultra-wideband wireline transceiver, and logic-compatible non-volatile memory integrated circuits. He received the 2024 IEEE Tainan Section Best Young Professional Member Award.

Security Threats in Hardware Design: Side-Channel Leakage, Countermeasures, and Evaluation Techniques

Abstract

Recent advances in computing technology, including the emergence of quantum computing, have exposed new vulnerabilities in cryptographic systems. At the same time, the proliferation of interconnected devices—from autonomous vehicles to IoT systems—has significantly raised the stakes for robust security. While cryptographic algorithms may be theoretically secure, their physical implementation in hardware can unintentionally leak sensitive information through side channels such as power consumption, electromagnetic radiation, or timing behavior. In this talk, I will explore various threat models and real-world examples of information leakage arising from hardware design choices. I will also discuss state-of-the-art countermeasures and methodologies for evaluating the resilience of hardware implementations against such attacks. The presentation aims to provide a broad perspective on the intersection of hardware design and security, highlighting both foundational principles and current research trends.

Biography

Daisuke Fujimoto received B.E., M.E., and Ph.D. degree in Engineering from Kobe University, Japan, in 2009, 2011 and 2014, respectively. He is currently an associate professor in the Graduate School of Information Science, Nara Institute of Science and Technology, Nara, Japan.  He is also an invited researcher of National Institute of Advanced Industrial and Science Technology (AIST), Japan. His research interests include hardware security and implementation of security cores. He is a member of IEEE, IEICE, IPSJ.

Enabling Noise-Suppressed Speech Intelligence with Audio Sensor System Ics

Abstract

Speech-enabled edge devices and intelligent audio systems require high-performance, low-power audio sensor ICs that operate reliably in noisy environments. To address this need, we present high-resolution oversampling ADC architectures optimized for audio sensing. Also, multi-microphone beamforming is employed for noise suppression, where we have developed a hardware-efficient four-channel microphone array with low-complexity processing. A key aspect of our approach is the synergetic co-design of analog ADCs and digital beamformers, enhancing system performance while reducing power consumption. We are now extending these techniques to drone audition applications, where high ego-noise has been a major barrier to practical use. We are developing advanced noise suppression methods, including AI denoising and a beamforming algorithm tailored for drone environments, to enable robust sound sensing under challenging conditions.

Biography

Taewook Kang received the B.S. and M.S. degrees in Electrical and Computer Engineering from Seoul National University, South Korea, in 2011 and 2013, respectively, and the Ph.D. degree from the University of Michigan, Ann Arbor, USA, in 2021. He worked as a mixed-signal circuit designer at Silicon Mitus, South Korea (2013–2016), and Apple, Cupertino, USA (2021–2024). Since 2024, he has been an Assistant Professor in Semiconductor Convergence Engineering at Sungkyunkwan University, South Korea. His research focuses on mixed-signal circuits for audio system ICs, including oversampling data converters, acoustic beamforming, and hardware-efficient speech recognition and denoising.